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VNP10N06 "omnifet": fully autoprotected power mosfet june 1997 1 2 3 to-220 block diagram type v clamp r ds(on) i lim VNP10N06 60 v 0.3 w 10 a n linear current limitation n thermal shut down n short circuit protection n integrated clamp n low current drawn from input pin n logic level input threshold n esd protection n schmitt trigger on input n high noise immunity n standard to-220 package description the VNP10N06 is a monolithic device made using sgs-thomson vertical intelligent power m0 technology, intended for replacement of standard power mosfets in dc to 50 khz applications. built-in thermal shut-down, linear current limitation and overvoltage clamp protect the chip in harsh enviroments. 1/11
absolute maximum rating symbol parameter value unit v ds drain-source voltage (v in = 0) internally clamped v v in input voltage internally clamped v i in input current 20 ma i d drain current internally limited a i r reverse dc output current -15 a v esd electrostatic discharge (c= 100 pf, r=1.5 k w ) 4000 v p tot total dissipation at t c = 25 o c42w t j operating junction temperature internally limited o c t c case operating temperature internally limited o c t stg storage temperature -55 to 150 o c thermal data r thj-case r thj-amb thermal resistance junction-case max thermal resistance junction-ambient max 3 62.5 o c/w o c/w electrical characteristics (t case = 25 o c unless otherwise specified) off symbol parameter test conditions min. typ. max. unit v clamp drain-source clamp voltage i d = 200 ma v in = 0 506070 v v il input low level voltage i d = 100 m a v ds = 16 v 1.5 v v ih input high level voltage r l = 27 w v dd = 16 v v ds = 0.5 v 3.2 v v incl input-source reverse clamp voltage i in = -1 ma i in = 1 ma -1 8 -0.3 11 v v i dss zero input voltage drain current (v in = 0) v ds = 50 v v in = v il v ds < 35 v v in = v il 250 100 m a m a i iss supply current from input pin v ds = 0 v v in = 5 v 150 300 m a on ( * ) symbol parameter test conditions min. typ. max. unit r ds(on) static drain-source on resistance v in = 7 v i d = 1 a t j < 125 o c 0.15 0.3 w dynamic symbol parameter test conditions min. typ. max. unit c oss output capacitance v ds = 13 v f = 1 mhz v in = 0 350 500 pf VNP10N06 2/11
electrical characteristics (continued) switching ( ** ) symbol parameter test conditions min. typ. max. unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 16 v i d = 1 a v gen = 7 v r gen = 10 w (see figure 3) 1100 550 200 100 1600 900 400 200 ns ns ns ns t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 16 v i d = 1 a v gen = 7 v r gen = 1000 w (see figure 3) 1.2 1 1.6 1.2 1.8 1.5 2.3 1.8 m s m s m s m s (di/dt) on turn-on current slope v dd = 16 v i d = 1 a v in = 7 v r gen = 10 w 1.5 a/ m s q i total input charge v dd = 12 v i d = 1 a v in = 7 v 13 nc source drain diode symbol parameter test conditions min. typ. max. unit v sd ( * ) forward on voltage i sd = 1 a v in = v il 0.8 1.6 v t rr ( ** ) q rr ( ** ) i rrm ( ** ) reverse recovery time reverse recovery charge reverse recovery current i sd = 1 a di/dt = 100 a/ m s v dd = 30 v t j = 25 o c (see test circuit, figure 5) 125 0.22 3.5 ns m c a protection symbol parameter test conditions min. typ. max. unit i lim drain current limit v in = 7 v v ds = 13 v 6 10 15 a t dlim ( ** ) step response current limit v in = 7 v v ds step from 0 to 13 v 12 20 m s t jsh ( ** ) overtemperature shutdown 150 o c t jrs ( ** ) overtemperature reset 135 o c e as ( ** ) single pulse avalanche energy starting t j = 25 o c v dd = 24 v v in = 7 v r gen = 1 k w l = 10 mh 250 mj ( * ) pulsed: pulse duration = 300 m s, duty cycle 1.5 % ( ** ) parameters guaranteed by design/characterization VNP10N06 3/11
protection features during normal operation, the input pin is electrically connected to the gate of the internal power mosfet through a low impedance path as soon as v in > v ih . the device then behaves like a standard power mosfet and can be used as a switch from dc to 50khz. the only difference from the users standpoint is that a small dc current (typically 150 m a) flows into the input pin in order to supply the internal circuitry. during turn-off of an unclamped inductive load the output voltage is clamped to a safe level by an integrated zener clamp between drain pin and the gate of the internal power mosfet. in this condition, the power mosfet gate is set to a voltage high enough to sustain the inductive load current even if the input pin is driven to 0v. the device integrates an active current limiter circuit which limits the drain current i d to i lim whatever the input pin voltage. when the current limiter is active, the device operates in the linear region, so power dissipation may exceed the heatsinking capability. both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold t jsh . if t j reaches t jsh , the device shuts down whatever the input pin voltage. the device will restart automatically when t j has cooled down to t jrs VNP10N06 4/11
thermal impedance output characteristics static drain-source on resistance derating curve static drain-source on resistance vs input voltage static drain-source on resistance VNP10N06 5/11
input charge vs input voltage normalized input threshold voltage vs temperature normalized on resistance vs temperature capacitance variations normalized on resistance vs temperature turn-on current s lope VNP10N06 6/11
turn-on current slope turn-off drain-source voltage slope switching time resistive load turn-off drain-source voltage slope switching time resistive load switching time resistive load VNP10N06 7/11
current limit vs junction temperature source drain diode voltage vs junction temperature step response current limit VNP10N06 8/11
fig. 2: unclamped inductive waveforms fig. 3: switching times test circuits for resistive load fig. 4: input charge test circuit fig. 1: unclamped inductive load test circuits fig. 5: test circuit for inductive load switching and diode recovery times fig. 6: waveforms VNP10N06 9/11
dim. mm inch min. typ. max. min. typ. max. a 4.40 4.60 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 d1 1.27 0.050 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.4 2.7 0.094 0.106 h2 10.0 10.40 0.393 0.409 l2 16.4 0.645 l4 13.0 14.0 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.2 6.6 0.244 0.260 l9 3.5 3.93 0.137 0.154 dia. 3.75 3.85 0.147 0.151 l6 a c d e d1 f g l7 l2 dia. f1 l5 l4 h2 l9 f2 g1 to-220 mechanical data p011c VNP10N06 10/11
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specification s mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously s upplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems with out express written approval of sgs-thomson microelectonics. ? 1997 sgs-thomson microelectronics - printed in italy - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the n etherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a . VNP10N06 11/11

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